Electrostatic Discharge

Design, characterization and development of Electrostatic Discharge (ESD) protection structures for CMOS and Smart Power (BCD technology: Bipolar, CMOS, DMOS) platforms, assisted by advanced IC failure analysis techniques

Summary: An extended activity of characterization, testing, and development has been carried out for both CMOS and SMART POWER (BCD, Bipolar, CMOS, DMOS, and BCD SOI, Silicon over Insulator) technologies. Tested structures have been analyzed by means of electrical measurements, electroluminescence (emission microscopy) measurements, and electro-thermal drift-diffusion bi-dimensional simulations. Under this framework, a new methodology for ESD protection structures development has been established. Combining the previous mentioned measurement techniques and simulation activities, the new methodology aims to greatly reduce the development times nowadays required to the design of state-of-art ESD protection structures. In order to properly characterize and test ESD protection structures, an ad-hoc measurement setup has been developed, based on the time-domain-reflectometer transmission line charging (TDR-TLP). The system is characterized by higher performances than previous lab-made ones. The research activity carried out so far has led up to innovative ESD protection structures characterized by higher robustness than previous ones, and relevant scientific results published in journals or presented at international conferences (invited talks and best papers awards have been gathered within this activity).

Main results: The most important and original results can be summarized as following:

  1. The dynamic response of ESD protection structures has been characterized for the first time by means of an electron-beam (e-beam) setup, allowing the evaluation of the electrical transient evolution (during an ESD event ) of such structures with a timing resolution down to 100ps.
  2. The e-beam based measurement setup has been also used to extract the turn-on time of ESD protection structures (lower than 1 ns), and the effectiveness of the structures submitted to very fast ESD events (such as Charged Device Model, CDM, characterized by transient evolution lasting less than 1 ns) has been fully investigated.
  3. Using the “transmission line charging” methodology, a Transmission Line Pulser (TLP) setup has been developed. It is able to produce very high voltage/current pulses (higher than 20 A) characterized by a very fast rise time (below 1 ns), and user selectable length (50ns–500ns).
  4. A new “predictive” methodology has been identified in order to improve the development of high-efficiency ESD protection structures combining both experimental data, and 2D electro-thermal simulations results.

Innovative ESD protection structures have been developed for the BCD technology, characterized by excellent ESD robustness (robustness in excess than 8 kV HBM has been reached for almost all studied technologies).

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